// -*- mode:c++ -*-
//
// 2009-2010 HIT Microelectronic Center all rights reserved
//
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// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
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// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
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// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//
// Date: Aug. 2010
// Authors: Gou Pengfei

output header {{
	class HOp:public TRIPSStaticInst
	{
		protected:

		/// Constructors for TRIPS G format instructions
		HOp(const char* mnem, MachInst _machInst, OpClass __opClass):
			TRIPSStaticInst(mnem, _machInst, __opClass)
		{
		    // Register read/write is not predicatable.
		    _predication = Disable;
		}
		
		std::string generateDisassembly(Addr pc, const SymbolTable *symTab) const;
	};

}};

output decoder {{
	std::string HOp::generateDisassembly(Addr pc, const SymbolTable* symtab) const {
		std::stringstream ss;
		ccprintf(ss, "%-10s",mnemonic);
		ss<<" ";
		if (_numSrcRegs > 0) ccprintf(ss, "gr[%d]", _srcRegIdx[0]);
		if (_numConsumers > 0) printConsumer(ss, 0);
		if (_numConsumers > 1) printConsumer(ss, 1);
		if (_numDestRegs > 0) ccprintf(ss, "gw[%d]", _destRegIdx[0]);
		return ss.str();
	}
}};

// Declarations for execute() methods.
def template HExecDeclare {{
        Fault execute(%(CPU_exec_context)s *, Trace::EdgeInstRecord * ) const;
}};

// Header Read class constructor template.
def template HRConstructor {{
        inline %(class_name)s::%(class_name)s(MachInst machInst)  : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
        {
                %(constructor)s;

                // Check for consumers to make sure it conform the TRIPS ISA convention.
                if (T0_R != T1_R ) {
                    _numConsumers = 2;
                    _consumerID[0] = ( 0x1 << 8 ) | T0_R;
                    _consumerID[1] = ( 0x1 << 8 ) | T1_R;
                } else {
                    _numConsumers = 1;
                    _consumerID[0] = ( 0x1 << 8 ) | T0_R;
                }
        }
}};


// Basic instruction class declaration template.
def template HDeclare {{
        /**
         * Static instruction class for "%(mnemonic)s".
         */
        class %(class_name)s : public %(base_class)s
        {
          public:
                /// Constructor.
                %(class_name)s(MachInst machInst);
                %(HExecDeclare)s
        };
}};

// Header Read format, consumers are set by hand in the constructor.
def format HeaderRead(code,*opt_flags) {{
        opt_flags+=('IQOPerands',)
	iop = InstObjParams(name,Name,'HOp',code,opt_flags)
	header_output = HDeclare.subst(iop)
	decoder_output = HRConstructor.subst(iop)
	decode_block = BasicDecode.subst(iop)
	exec_output = BasicExecute.subst(iop)
}};

// Header Write format
def format HeaderWrite(code,*opt_flags) {{
        opt_flags+=('IQOPerands','IsEDGE',{'numConsumer':0},)
	iop = InstObjParams(name,Name,'HOp',code,opt_flags)
	header_output = HDeclare.subst(iop)
	decoder_output = BasicConstructor.subst(iop)
	decode_block = BasicDecode.subst(iop)
	exec_output = BasicExecute.subst(iop)
}};

